Physical Design Engineer

Job Description

• As part of the Ampere Computing Physical Design team you will be working on cutting-edge designs in 7nm and 16nm process nodes. You will be responsible for and own all aspects of physical design and physical verification effort at a block/sub-chip level. Will develop support and maintain physical design flows and methodologies.Responsibilities:*Will include block level ownership of design unit level verification design reviews;*Working with multiple sites in a team environment particularly with client locationGood knowledge of EDA tools from Synopsys Cadence and Mentor required. In particular experience with PTSI Innovus Nanoroute Calibre StarRC and Conformal LEC is essential.*Good knowledge of VLSI process and device characteristics to make optimal trade-off between performance and power.*Good knowledge of standard cell libraries circuit design and cell layout.*Good understanding of static timing analysis (STA) EM/IR and sign-off flows.*Expert in physical design of high frequency chips with emphasis on successful timing closure.*Excellent understanding of geometry/ process/ device technology implications on physical design.*Expert in physical design verification.*Strong hands-on experience with:Floor planning place & route power and clock distribution pin placement and timing constraints generation.Timing convergence using high speed design techniques with signal integrity & EM/IR.*Physical design verification.*Functional verification at various levels of design hierarchy with respect to golden RTL by formal methods.*Prior experience with 16nm or finer geometries is a plus.Good software and scripting skills (perl python tcl).*Self-driven individual and an excellent team player experienced in working with remote teams.*Must have good communication skills and the ability and desire to work as a team. 

Job Summary